High-Bandwidth Transfers
High-performance data transfer engine enabling efficient bulk memory operations without CPU overhead. 4 independent channels with linked list descriptors and scatter-gather support for cryptographic data feeds, key loading, and peripheral communication.
Four independent DMA channels operating concurrently. Each channel has its own configuration, status, and interrupt, enabling parallel data movement across multiple peripherals simultaneously.
Hardware-managed linked list descriptor chains enable complex multi-block transfer sequences without CPU intervention. Program once, transfer autonomously through any number of memory regions.
Scatter-gather capability collects data from non-contiguous memory regions into a single transfer or distributes a single source across multiple destinations — essential for cryptographic key loading and buffer management.
Specifications
| Parameter | Value |
|---|---|
| Channels | 4 independent |
| Transfer Modes | Memory-to-Memory, Memory-to-Peripheral, Peripheral-to-Memory |
| Descriptor Support | Linked list (hardware-managed) |
| Scatter-Gather | Yes |
| Data Width | 32 bits |
| Bus Masters | 2 (Read + Write) |
| Interrupts | Per-channel completion + error |
| Target Frequency | 80 MHz |
Contact our team for evaluation access or custom DMA configurations for your system architecture.