A high-performance lattice-based key encapsulation engine delivering NIST Category 3 security with constant-time execution and deterministic latency. Purpose-built silicon for quantum-safe key exchange at scale.
Dedicated polynomial arithmetic and hash acceleration engines complete full key exchange operations in sub-millisecond latency at standard clock frequencies.
Every operation executes in data-independent time. No conditional branches on secret data, no variable-time memory accesses — eliminating all timing side-channel vectors.
Standard bus interface with register-mapped control for drop-in SoC integration. Compatible with any processor architecture. Includes driver library and integration guides.
The ML-KEM-768 Accelerator is a self-contained cryptographic core implementing the NIST FIPS 203 Module-Lattice-Based Key Encapsulation Mechanism at Category 3 security (equivalent to 192-bit AES). It performs key generation, encapsulation, and decapsulation entirely in dedicated hardware, delivering the throughput and security guarantees that software-only implementations cannot match.
At its heart, the accelerator features purpose-built polynomial arithmetic and hash acceleration engines optimized specifically for the mathematical operations central to lattice-based cryptography. The result is deterministic, constant-time key exchange with power and timing profiles that reveal nothing about the secret keys being processed.
Designed for immediate deployment in data centers, telecommunications infrastructure, IoT devices, and government systems, the ML-KEM-768 Accelerator enables organizations to begin their quantum-safe migration today — well ahead of the CNSA 2.0 deadline of 2030.
| Parameter | Value |
|---|---|
| Algorithm | ML-KEM-768 (FIPS 203) |
| Security Level | NIST Category 3 |
| Classical Equivalent | 192-bit AES |
| Public Key | 1,184 bytes |
| Ciphertext | 1,088 bytes |
| Shared Secret | 32 bytes |
| Interface | Standard bus interface |
| Target Clock | 80 MHz |
| Parameter | Value |
|---|---|
| Algorithm | ML-KEM-768 (NIST FIPS 203) |
| Security Level | NIST Category 3 (192-bit classical equivalent) |
| Public Key Size | 1,184 bytes |
| Secret Key Size | 2,400 bytes |
| Ciphertext Size | 1,088 bytes |
| Shared Secret Size | 32 bytes |
| Parameter | Value |
|---|---|
| Interface | Standard register-mapped bus interface |
| Data Width | 32 bits |
| Target Clock Frequency | 80 MHz |
| Key Generation Latency | ~0.3 ms @ 80 MHz |
| Encapsulation Latency | ~0.35 ms @ 80 MHz |
| Decapsulation Latency | ~0.4 ms @ 80 MHz |
| Active Power (estimated) | ~5 mW @ 80 MHz, 1.8V |
| Idle Power (estimated) | <0.5 mW |
| Verification | NIST Known Answer Test vectors |
The ML-KEM-768 Accelerator enables quantum-safe key exchange across any system that today relies on RSA or elliptic-curve Diffie-Hellman for key establishment. With sub-millisecond operation latency, it supports real-time applications including TLS handshakes, VPN tunnel establishment, IoT device provisioning, and cloud HSM operations — all without compromising throughput or introducing variable-time execution paths.
Choose the integration level that matches your design requirements.
Complete source with verification suite, driver library, and documentation. Maximum flexibility for any target technology or process node.
Optimized for target technology with timing models and physical abstractions. Pre-characterized for guaranteed performance. Faster time-to-integration.
Fully validated physical implementation with complete signoff documentation. Silicon-proven and foundry-validated for immediate integration into your chip.
Security cores that pair with the ML-KEM-768 Accelerator.
Contact our team for evaluation access, product documentation, or custom integration support.